Note :
Time: 3 hours
There are six questions in this paper. Question number 1 is compulsory and carries 30 marks. Answer any three from the rest.
Question 1
(a) Design an incrementer circuit, which takes a BCD digit
(4 bit input) as input, increments the value and outputs the incremented
value. For example if the BCD input is 0 that is 0000, it is incremented
to 1 that is 0001, or if the BCD input is 9 that is 1001, it is incremented
to 0 that is 0000, as the 5th bit 1 is discarded. Also draw
the resulting logic diagram. (10)
(b) Suppose a stack is to
be used by CPU to manage subroutine calls and returns. Write a program
segment in 8086 assembly which simulates parameter passing of one integer
value of 16 bit and one floating point number of 32 bit. Print these
values through the subroutine and then return to calling program and
once again print the values from the calling program. (10)
(c) What
is the role played by large register files in Reduced Instruction Set
Computers? Can this role be done by having a large Cache? Justify your
answer. (5)
(d) What are the usage of
the following in the context of computer architecture: (5)
Question 2
(a) Draw the logic diagram for an associative memory cell. (5)
(b) Draw the block diagram for a 4 bit adder-subtractor
circuit. This circuit is to be fabricated using four full adder circuits
and 4 exclusive OR gates. (5)
(c) Draw
the logic diagram for a 3 bit synchronous counter. (5)
Question 3
(a) Write a program in 8086 assembly language to multiply
a four digit packed BCD number with decimal digit 4. (5)
(b) What are the steps required for writing a memory resident
Interrupt Servicing Routine for 8086 processor? Also explain the basic
requirements of Interrupt Servicing Program. (5)
(c) Write a program in 8086 assembly language to check
whether two strings are identical. (5)
Question 4
Compare and contrast the following: (15)
(a) Direct Memory Access versus Input-Output processor.
(b) Instruction and Arithmetic pipelining in array processors versus
Instruction and Arithmetic pipelining in Reduced Instruction Set Computers.
(c) (i) Static versus Dynamic RAMs
(ii) 2D chip
organisation versus 2 1/2D chip organisation.
(d)Horizontal micro instructions versus Vertical micro instructions.
(e) Associative Cache mapping versus Set Associative Cache mapping.
Question 5
(a) Design a floating-point representation for the following
number ranges: (5)
Maximum number = 1 * 1020
Minimum number = -1 * 1020
The base of representation = 2
Zero needs to represented by this format.
(b) What is Cache coherence problem? Why is it important
in shared-memory multi-processor systems? How can you resolve
this problem? (5)
(c) Describe the following terminology in the context of
multiprocessor systems: (5)
Question 6
(a) Write short notes on the following: (14)
(b) What is masking operation? Where is it used? Can masking be done by Exclusive OR operation? (1)